1. Field of the Invention
The present invention generally relates to semiconductor devices and more particularly to a semiconductor device having a heteroepitaxially grown substrate provided with a structure for interrupting dislocations.
2. Description of the Related Art
Recently, various semiconductor devices such as laser diodes, light emitting diodes, field effect transistors and the like, are fabricated on a group III-V semiconductor layer that is grown heteroepitaxially on a silicon substrate. Thereby, devices that exploit the advantageous material properties pertinent to the compound semiconductor materials can be constructed on the silicon substrate that is produced by a well established process.
In order to achieve satisfactory device characteristics, the semiconductor layer on which the devices are formed must have an excellent crystallinity, particularly about defects and dislocations. On the other hand, it is known that, because the group III-V compound semiconductor materials generally have lattice constants that differ significantly from those of silicon, the group III-V compound semiconductor materials grown directly on the silicon substrate tend to have the polycrystal phase.
In order to avoid this problem, use of buffer layers has been conventionally employed, wherein a buffer layer is interposed between the silicon substrate and the group III-V compound semiconductor layer for establishing a lattice matching. With the use of suitable buffer layer, one can obtain a single crystal layer of group III-V compound semiconductor layer grown on the silicon substrate. However, such a use of buffer layers increases complexity of fabrication process of semiconductor devices and is thought to be unpractical.
At present, there exist various techniques to grow a single crystal compound semiconductor layer directly on the silicon substrate without using the buffer layer. A typical example of this may be the so-called two-step growth process. The typical example of this process as applied to the case of growing a gallium arsenide (GaAs) layer on a silicon substrate includes the following steps: STEP(1) deposit a layer of GaAs on the silicon substrate at a low temperature as an amorphous phase; and STEP(2) deposit a layer of GaAs on the GaAs layer previously deposited at an increased temperature to form a single crystal GaAs layer that is grown heteroepitaxially on the silicon substrate.
During the latter step, the amorphous GaAs layer deposited previously is crystallized because of the elevated temperature, and the structure obtained after the step 2 has a layered structure substantially consisting of the silicon substrate and a single layer of GaAs. According to this two-step process, the GaAs layer can grown on the silicon substrate as a single crystal layer.
In the foregoing process, however, there arises a problem in that, because of the discrepancy in the lattice constant and thermal expansion between the substrate and the GaAs layer, numerous dislocations are generated at the interface between the substrate and the GaAs layer and such dislocations are propagated toward the surface of the GaAs layer. The generation of the dislocations cannot be eliminated even when the two-step process is employed. Obviously, such dislocations cause deterioration of the device characteristics and should be avoided.
In order to eliminate the problem of dislocations, various structures have been proposed conventionally for interrupting propagation of dislocations. For example, use of a strained superlattice has been proposed as the intervening layer interposed between the silicon substrate and the GaAs layer to interrupt the propagating dislocations.
FIG. 1 shows a conventional structure of compound semiconductor device grown on a silicon substrate 21.
Referring to FIG. 1, a GaAs layer 22 is provided on the silicon substrate 21 by the previously described two-step process. For example, the layer 22 may be deposited with a thickness of about 200 .ANG. at a temperature of about 400.degree.-450.degree. C. by the metal-organic chemical vapor deposition (MOCVD) process. Thereby, the layer 22 is formed as an amorphous phase. Further, there is provided a strained superlattice layer 23 on the GaAs layer 22 as the layer for interrupting the propagation of dislocations. It should be noted that there are numerous dislocations 25-1, 25-2 created at the interface between the silicon substrate 21 and the GaAs layer 23. The strained superlattice layer 23 may comprise an alternating repetition of a GaAs layer and an InGaAs layer each having a thickness of about 100 .ANG.. Thereby, a lateral strain acting parallel to the major plane of the layer 23 is developed, and the dislocations 25-1 propagating upwards from the interface between the substrate 21 and the GaAs layer 22 are interrupted or deflected in a direction parallel to the major plane.
On the superlattice layer 23, there is provided a GaAs layer 24 on which an active semiconductor device not illustrated is formed. This layer may be provided by the MOCVD process with a thickness of about 1-1.5 .parallel.m at about 700.degree. C. Upon the growth of the layer 24, the amorphous GaAs layer provided previously as the amorphous phase is crystallized. With the strained superlattice layer 23 provided underneath, the GaAs layer 24 has a reduced dislocation density.
In the conventional structure, however, there has been a problem in that the dislocation density that can be achieved is limited in the order of 10.sup.7 cm.sup.-2 or more. Some of the dislocations 25-2 penetrate through the strained superlattice layer 23. This value of 10.sup.7 cm.sup.-2 is not satisfactory for the semiconductor layer on which the active semiconductor devices are formed. As the semiconductor layer for the active layer of semiconductor devices, the layer 24 is generally required to have the dislocation density of 106 cm.sup.-2 or less.